Cambricon Technologies MLU100-D Intelligent Processing Card User Manual MLU100 D Series Intelligent Processing Card v2
Cambricon Technologies Corporation Limited Intelligent Processing Card MLU100 D Series Intelligent Processing Card v2
MLU100-D Series Intelligent Processing Card User Manual v2





![Cambricon, MLU100-D Series Intelligent Processing Card User Manual, 2018-09 2.2 Software specifications Table 2 Describes the software specifications of MLU100-D Series Card: PCIe Base address(MLU100) PF (1,64bit): BAR0: 256MB prefetchable BAR2: 16MB prefetchable BAR4: 64MB prefetchable VF(4,64bit): BAR0: 16MB non-prefetchable BAR2: 16MB non- prefetchable BAR4: 16MB non-prefetchable ECC Protect Yes (Enabled by default) SMBus (8bit Address) 0x8E (write) 0x8F (read) Table 2 PCIE Card Software Specifications SMBUS Register is 32-bit wide, and Table 3 describes how to read a register: M->S M->S S->M S->M M->S S->M M->S S->M M->S S->M M->S M->S 1 8 1 8 1 8 1 8 1 8 1 1 Sr SLAVE ADDRESS(Read) ACK DATA[7:0] ACK DATA[15:8] ACK DATA[23:16] ACK DATA[31:24] N P Table 3 SMBUS register reading Table 4 describes the definition and address of SMBUS registers: DIRECTION M->S M->S S->M M->S S->M BITS 1 8 1 8 1 CONTENT S SLAVE ADDRESS(Write) ACK REGISTER ADDRESS ACK Registers Address Access Description Total Card Power 0x01 RO Card Power consumption, Float Data, Unit W Card Temperature 0x02 RO Card Temperature, Float Data, Unit ℃ Chip Temperature 0x03 RO Chip Temperature, Float Data, Unit ℃ PCIE Vendor ID and Device ID 0xA0 RO [15:0] Vendor ID [31:16] Device ID PCIE Sub-Vendor ID and Sub-System ID 0xA1 RO [15:0] Sub-Vendor ID [31:16] Sub-System ID Device Name 0xF0 RO](https://usermanual.wiki/Cambricon-Technologies/MLU100-D/User-Guide-4116039-Page-6.png)




